The present invention relates to video processing, and more particularly, to video processing circuits and methods capable of utilizing the same buffers for a cross color suppressor and a video decoder such as a composite signal decoder or a composite signal demodulator.
Please refer to FIG. 1. FIG. 1 is a diagram of a video processing circuit 10 according to the related art, where the video processing circuit 10 comprises a video decoder 12 comprising its own line and frame buffers (not shown), a cross color suppressor 14 comprising its own line and frame buffers (not shown), a de-interlace circuit 16, and a scalar 18. According to the related art, the cross color suppressor 14 is introduced for solving cross color problems. In contrast to a conventional video processing circuit without a cross color suppressor, this kind of architecture as shown in FIG. 1 leads to additional requirements of field/frame buffer(s), line buffer(s), and calculation logic and further leads to additional requirements of memory access bandwidth for these buffers, causing a trade-off between the cross color problems and the additional requirements mentioned above.